Add isolated CPU residency performance probe without changing AR
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# Independent CPU residency performance probe
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This is a bounded engineering experiment authorized after the user asked to try
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reducing repeated process startup. It does not replace or modify registered AR,
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its timing/seed/dynamics, any frozen model, or any existing scientific artifact.
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No GPU worker or new brain simulation is launched, and AR interim learning
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outputs are not inspected. Input selection uses the two named, already sealed
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AQ engineering fixtures, not outcomes from the ongoing experiment.
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## Fixed experiment
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Serial sequence: M, N, M, N_D0, N_frozen, M_D0, M. M is the mechanical fresh
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parent; N is the natural light fresh engineering trial, whose actual prior
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overlay comes from an AP learned snapshot. The three explicitly derived command
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controls change only D=0/frozen over the same sealed events. These are not new
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conditioning trials and do not alter the underlying files or install weights.
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Compare fresh original epoch postprocessing against the exact same function
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called repeatedly in a dedicated worker. Preserve all original hashes and
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checkpoint validation; do not cache mutable neural state or delta. Every output
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is independently checked by the original fresh-process CPU validator. A second,
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separate resident validator is a clearly identified prototype: it has a new
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schema/source identity, caches only SHA-checked module identity, and preserves
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the original numerical and input-checking body.
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Require exact four-file SHA identity, raw delta dtype/shape/byte identity,
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complete update-receipt/trace-digest identity, and identical scientific verifier
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fields. Compare mechanical and natural cases back to their original AQ outputs.
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Check D0/frozen byte identity, and source/consumed-input hashes before and after.
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Each task ACK is distinct from a true worker process exit. Both resident workers
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must exit zero as observed by their parent; every fresh validator must exit zero.
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One active CPU task at a time, one numerical thread, low scheduling priority,
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CUDA hidden and uninitialized, at most seven rows, 180-second child-response
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limit and 900-second experiment limit. Fail closed, preserve partial outputs,
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no automatic retry. New output root must be an empty temporary directory outside
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the registered experiment/model trees. No full-history rescan is claimed.
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## Interpretation limits
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Report cold and warm timings separately. Fresh reference and resident treatment
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use the same unchanged inputs, original function body and complete validation.
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The comparison excludes GPU/brain work, AP outer wrapper and AR ledger overhead.
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It cannot establish whole-run speedup, GPU correctness, sequence generality,
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learning success or readiness to replace AR. Nonzero prior delta is included,
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but only two source trajectories and one compartment are covered. Broadening to
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different compartments or a persistent GPU runtime requires a new independent
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equivalence test and authorization before replacing a registered workflow.
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