Seal Phase4AF exact short fullgraph author GPU gate and APL integration audit
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{
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"complete_marker": "summary.json with complete=true; partial memmaps alone are not a completed trial",
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"event_file": "events.bin",
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"event_order": "tick then canonical neuron_idx",
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"event_record": [
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[
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"step",
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"<i4"
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],
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[
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"neuron_idx",
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"<i4"
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]
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],
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"g_file": "g-history.float64.npy",
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"history_shape": [
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500,
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166700
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],
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"queue_file": "queue.jsonl",
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"queue_joint_bytes": "b'phase4af-queue-v1\\0' + struct.pack('<qq',tick,count) + all ordered <i8 edge IDs + all uint8 acceptance bits",
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"queue_separate_hashes": "SHA256 of each pure byte sequence without header",
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"ref_dtype": "little-endian int32",
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"ref_file": "ref-history.int32.npy",
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"v_file": "v-history.float64.npy",
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"v_g_dtype": "little-endian float64",
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"voltage_unit": "SI volt"
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}
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