Archive MaleCNS research sources, provenance, bibliography and immutable data inventory

This commit is contained in:
Digital Drosophila Archive
2026-09-29 03:38:32 +08:00
commit 3981628ff8
682 changed files with 161475 additions and 0 deletions
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"gpu": "NVIDIA GeForce RTX 4090",
"host": "ai",
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"status": "MaleCNS-LIF-runtime-v2-deterministic-candidate",
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}
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# MaleCNS-NumericalContract-v1
Status: immutable candidate contract for `MaleCNS-LIF-runtime-v2-deterministic-candidate`.
## Frozen tensors and arithmetic
- State (`V`, `g`, ring-buffer arrivals, effective edge weights): IEEE-754 binary32.
- CSR `indptr` and edge ids: int64; target indices: int32; refractory/counts: int32.
- Effective edge weights are the frozen Phase 4C signed float32 weights; raw synapse counts remain unchanged.
- Canonical contribution key: `['target_idx', 'source_idx', 'edge_id']`. Since global CSR edge ids are source-row ordered, stable `(target_idx, edge_id)` sorting is equivalent.
- Each target is owned by one thread and accumulated sequentially with round-to-nearest-even `__fadd_rn`. Scientific fan-out contains no atomic add.
## Per-timestep total order
1. Read and clear the current exact ring-buffer slot.
2. `g = float32(g * g_decay)`, then `g = float32(g + recurrent_arrival)`.
3. Decrement refractory by one; while refractory remains nonzero, hold `V = V_reset`.
4. For available neurons, forward Euler: `V = float32(V + alpha * (g - (V - V_rest)))`, with every elementary operation rounded to float32.
5. Detect spikes using the frozen comparison `V >= V_threshold`; reset and set exact refractory steps.
6. Apply same-step external forced-spike events in ascending target index; a neuron already spiking or refractory is not double-counted.
7. Enumerate spiking source indices in ascending neuron index. Expand each CSR row in edge-id order.
8. Stable-sort contributions by target only, preserving source/edge order, then perform fixed sequential segmented sums.
9. Add each segment once to the ring-buffer slot exactly 18 steps ahead.
10. Emit events in `(simulation_step, neuron_idx)` order. Simultaneous events never receive a hidden priority beyond neuron index.
No threshold epsilon, voltage rounding/snap, float64 model substitution, approximate delay, topology change, or parameter change is permitted.
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{
"accumulation": "sequential IEEE-754 float32 round-to-nearest-even using __fadd_rn",
"contribution_key": [
"target_idx",
"source_idx",
"edge_id"
],
"delay_steps": 18,
"edge_id_property": "CSR edge_id is globally ordered by source row and within-row edge position",
"equivalent_implementation_key": [
"target_idx",
"edge_id"
],
"external_event_order": "ascending target neuron_idx after intrinsic threshold evaluation",
"state_order": [
"arrival+g_decay",
"refractory_decrement",
"membrane_integration",
"threshold/reset",
"external_force",
"canonical_fanout",
"delay_enqueue"
],
"state_update": "fused explicit IEEE-754 float32 operations using __fmul_rn/__fadd_rn/__fsub_rn",
"threshold": "V >= V_threshold",
"threshold_comparison": ">=",
"version": "MaleCNS-NumericalContract-v1"
}
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{
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{
"five_trials_x20_exact": true,
"level": "R1",
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"olfactory-50hz": {
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"g": 20,
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},
"name": "Phase4C whole-brain propagation baseline",
"status": "PASS"
}
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{
"ActivityStream": true,
"BrainIO": true,
"checkpoint_restore": true,
"level": "R2",
"name": "Phase4D BrainIO / continuous stepping",
"status": "PASS"
}
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@@ -0,0 +1,59 @@
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